The use of advanced packaging techniques for integrated circuits technologies sometimes requires that the completed semiconductor wafer be extremely thin (on the order of one to five mils thick). Unfortunately, wafers this thin are so fragile that they easily break when handled or processed by conventional methods. A typical technique for forming a thin wafer is diagrammatically illustrated in the sequence of FIGS. 1 and 2, which depict a semiconductor wafer 11 supported by an underlying `handle` substrate 15. Wafer 11 contains a plurality of integrated circuit regions 13 and is insulated from substrate 15 by way of an intervening oxide layer 17 (FIG. 1). To separate wafer 11 into individual dice, the wafer is patterned, for example, by way of a reactive ion etch to form a trench 21 down to the surface of oxide layer 17. The underlying handle layer is then removed by grinding, followed by an etch wash of the oxide layer, leaving only the thin wafer and oxide. Handling of the resulting structure (which may have a diameter up to five inches) is very difficult and may damage the devices.